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M25P80-VMP6TP Datasheet(PDF) 50 Page - Numonyx B.V

Part # M25P80-VMP6TP
Description  8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface
PDF  52 Pages
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M25P80-VMP6TP Datasheet(HTML) 50 Page - Numonyx B.V

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Revision history
M25P80
50/52
13
Revision history
Table 21.
Document revision history
Date
Revision
Changes
24-Apr-2002
1.0
Document released as a Product Preview data sheet
Clarification of descriptions of entering Standby Power mode from Deep
Power-down mode, and of terminating an instruction sequence or data-out
sequence.
27-Sep-2002
1.1
VFQFPN8 package (MLP8) added. Order code (MW) corrected on page 1
for SO8 package. Document promoted to Preliminary Data.
13-Dec-2002
1.2
Typical Page Program time improved. Write Protect setup and hold times
specified, for applications that switch Write Protect to exit the Hardware
Protection mode immediately before a WRSR, and to enter the Hardware
Protection mode again immediately after.
24-Oct-2003
2.0
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
40MHz AC Characteristics table included as well as 25MHz. Change of
naming for VDFPN8 package. Document promoted to full datasheet
24-Nov-2003
2.1
Improvement to description of reading the 8-bit electronic signature.
21-Apr-2004
3.0
SO16 package added. SO8W package removed. Soldering temperature
information clarified for RoHS compliant devices. Device Grade clarified
07-May-2004
4.0
Automotive range added
18-May-2004
5.0
SO8W package re-instated, but under limited availability
05-Aug-2004
6.0
Data-retention measurement temperature corrected. Details of how to find
the date of marking added.
01-Aug-2005
7.0
Updated Page Program (PP) instructions in Page Programming, Page
Program (PP), Instruction times and Instruction Times (Device Grade 3).
20-Oct-2005
8.0
SO16 package removed. All packages are ECOPACK®. MLP8 package
renamed as VFQFPN8. Plating technology clarified in Table 20: Ordering
information scheme. VFQFPN silhouette modified (see silhouette on page
1). tSHQZ timing modified in Figure 25: Output timing.
13-Apr-2006
9
Device grade 3 specifications removed from datasheet. Data retention
conditions changed in Table 11: Data retention and endurance.
Figure 3: Bus Master and memory devices on the SPI bus modified and
Note 2 added.
Note 2 added below Figure 26 and Note 2 added below Figure 27.
Note on SO8 package removed below Table 20: Ordering information
scheme.
20-Jul-2006
10
SO8N package added (see Figure 28 and Table 19).



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