PIC16F87X datasheet(33/200 Pages) MICROCHIP

33 / 200 page

PIC16F87X

Preliminary

DS30292A-page 33

3.3

PORTC and the TRISC Register

PORTC is an 8-bit wide bi-directional port. The corre-

sponding data direction register is TRISC. Setting a

TRISC bit (=1) will make the corresponding PORTC pin

an input, i.e., put the corresponding output driver in a

hi-impedance mode. Clearing a TRISC bit (=0) will

make the corresponding PORTC pin an output, i.e., put

the contents of the output latch on the selected pin.

PORTC is multiplexed with several peripheral functions

(Table 3-5). PORTC pins have Schmitt Trigger input

buffers.

When the I2C module is enabled, the PORTC (3:4) pins

can be conﬁgured with normal I2C levels or with

SMBUS levels by using the CKE bit (SSPSTAT <6>).

When enabling peripheral functions, care should be

taken in deﬁning TRIS bits for each PORTC pin. Some

peripherals override the TRIS bit to make a pin an out-

put, while other peripherals override the TRIS bit to

make a pin an input. Since the TRIS bit override is in

effect while the peripheral is enabled, read-modify-

write instructions (BSF, BCF, XORWF) with TRISC as

destination should be avoided. The user should refer to

the corresponding peripheral section for the correct

TRIS bit settings.

EXAMPLE 3-1:

INITIALIZING PORTC

BCF

STATUS, RP0

; Select Bank 0

CLRF

PORTC

; Initialize PORTC by

; clearing output

; data latches

BSF

STATUS, RP0

; Select Bank 1

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISC

; Set RC<3:0> as inputs

; RC<5:4> as outputs

; RC<7:6> as inputs

FIGURE 3-5: PORTC BLOCK DIAGRAM

(PERIPHERAL OUTPUT

OVERRIDE) RC<0:2> RC<5:7>

FIGURE 3-6: PORTC BLOCK DIAGRAM

(PERIPHERAL OUTPUT

OVERRIDE) RC<3:4>

PORT/PERIPHERAL Select(2)

Data bus

PORT

TRIS

Data Latch

TRIS Latch

RD TRIS

Schmitt

Trigger

Peripheral Data Out

VDD

VSS

PORT

Peripheral

OE(3)

Peripheral input

I/O

pin(1)

Note 1:

I/O pins have diode protection to VDD and VSS.

Port/Peripheral select signal selects between port

data and peripheral output.

Peripheral OE (output enable) is only activated if

peripheral select is active.

PORT/PERIPHERAL Select(2)

Data bus

PORT

TRIS

Data Latch

TRIS Latch

RD TRIS

Schmitt

Trigger

Peripheral Data Out

VDD

VSS

PORT

Peripheral

OE(3)

SSPl input

I/O

pin(1)

Note 1:

I/O pins have diode protection to VDD and VSS.

Port/Peripheral select signal selects between port

data and peripheral output.

Peripheral OE (output enable) is only activated if

peripheral select is active.

CKE

SSPSTAT<6>

Schmitt

Trigger

with

SMBus

levels

PIC16F87X Datasheet(PDF) 33 Page - Microchip Technology

PIC16F87X Datasheet(HTML) 33 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL