ISL8485, ISL8490, ISL8491

FN6046 Rev 10.02

Page 8 of 15

Oct 2, 2023

FIGURE 3A. TEST CIRCUIT

FIGURE 3B. MEASUREMENT POINTS

FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL8490)

FIGURE 4A. TEST CIRCUIT

FIGURE 4B. MEASUREMENT POINTS

FIGURE 4. RECEIVER PROPAGATION DELAY

FIGURE 5A. TEST CIRCUIT

FIGURE 5B. MEASUREMENT POINTS

FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL8490)

Test Circuits and Waveforms (Continued)

D

DE

DI

CL

500Ω

Z

Y

VCC

GND

SW

PARAMETER OUTPUT

RE

DI

SW

CL (pF)

tHZ

Y/Z

X

1/0

GND

15

tLZ

Y/Z

X

0/1

VCC

15

tZH

Y/Z

0

1/0

GND

100

tZL

Y/Z

0

0/1

VCC

100

SIGNAL

GENERATOR

OUT (Y, Z)

3V

0V

1.5V

1.5V

VOH

0V

2.3V

VOH - 0.5V

tHZ

OUT (Y, Z)

VCC

VOL

2.3V

VOL + 0.5V

tLZ

DE

OUTPUT HIGH

OUTPUT LOW

SIGNAL

GENERATOR

R

RO

RE

A

B

+1.5V

15pF

RO

3V

0V

tPLH

1.5V

1.5V

VCC

0V

50%

50%

tPHL

A

1kΩ

VCC

GND

SW

PARAMETER

DE

AΩ

SW

tHZ

0

+1.5V

GND

tLZ

0-1.5V

VCC

tZH

0

+1.5V

GND

tZL

0-1.5V

VCC

SIGNAL

GENERATOR

R

RO

RE

A

B

15pF

RO

3V

0V

1.5V

1.5V

VOH

0V

1.5V

VOH - 0.5V

tHZ

RO

VCC

VOL

1.5V

VOL + 0.5V

tLZ

RE

OUTPUT HIGH

OUTPUT LOW