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PTH08T230W

2

4

8

+

7

Track

GND

TT

3

GND

GND

+Sense

5

L

O

A

D

−Sense

+

10

Inhibit

INH/UVLO

Auto−Track

9

6

−Sense

+Sense

SYNC

1

SmartSync

TurboTrans

™

1%

0.05 W

(Optional)

100

µF

(Required)

200

µF

Ceramic

(Required)

1%

0.05 W

(Required)

330

µF

(Required)

(Notes B and C)

[D]

PTH08T231W

2

Vi

4

8

CI

300 uF

(Required)

7

VI

Track

GND

VoAdj

Vo

TT

3

GND

GND

RTT

1%

0.05W

(Optional)

+Sense

5

L

O

A

D

−Sense

10

Inhibit

INH/UVLO

Auto−Track

9

6

−Sense

+Sense

Vo

SYNC

1

SmartSync

200

µF

Ceramic

(Required)

TurboTrans

™

1%

0.05 W

(Required)

(Note A)

[B]

PTH08T230W, PTH08T231W

SLTS265F – NOVEMBER 2005 – REVISED MAY 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

PTH08T230W

A.

B.

An additional 22-

µF ceramic input capacitor is recommended to reduce RMS ripple current.

C.

D.

200

µF of output capacitance can be achieved by using two 100-µF ceramic capacitors or four 47-µF ceramic

capacitors.

PTH08T231W - Ceramic Capacitor Version

A.

B.

200

µF of output capacitance can be achieved by using two 100-µF ceramic capacitors or four 47-µF ceramic

capacitors.

2

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