M29W320DT datasheet(19/56 Pages) STMICROELECTRONICS

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M29W320DT, M29W320DB

Command Interface

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program command sequence. The memory uses the higher voltage on the VPP/Write

Protect pin, to accelerate the Unlock Bypass Program operation.

Never raise VPP/Write Protect to VPP from any mode except Read mode, otherwise the

memory may be left in an indeterminate state.

4.6

Unlock Bypass Program command

The Unlock Bypass Program command can be used to program one address in the memory

array at a time. The command requires two Bus Write operations, the final write operation

latches the address and data in the internal state machine and starts the Program/Erase

Controller.

The Program operation using the Unlock Bypass Program command behaves identically to

the Program operation using the Program command. The operation cannot be aborted, the

Status Register is read and protected blocks cannot be programmed. Errors must be reset

using the Read/Reset command, which leaves the device in Unlock Bypass Mode. See the

Program command for details on the behavior.

4.7

Unlock Bypass Reset command

The Unlock Bypass Reset command can be used to return to Read/Reset mode from

Unlock Bypass Mode. Two Bus Write operations are required to issue the Unlock Bypass

Reset command. Read/Reset command does not exit from Unlock Bypass Mode.

4.8

Chip Erase command

The Chip Erase command can be used to erase the entire chip. Six Bus Write operations

are required to issue the Chip Erase Command and start the Program/Erase Controller.

If any blocks are protected then these are ignored and all the other blocks are erased. If all

of the blocks are protected the Chip Erase operation appears to start but will terminate

within about 100µs, leaving the data unchanged. No error condition is given when protected

blocks are ignored.

During the erase operation the memory will ignore all commands, including the Erase

Suspend command. It is not possible to issue any command to abort the operation. Typical

chip erase times are given in Table 6. All Bus Read operations during the Chip Erase

operation will output the Status Register on the Data Inputs/Outputs. See the section on the

Status Register for more details.

After the Chip Erase operation has completed the memory will return to the Read Mode,

unless an error has occurred. When an error occurs the memory will continue to output the

Status Register. A Read/Reset command must be issued to reset the error condition and

return to Read Mode.

The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All

previous data is lost.

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