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M48Z512A, M48Z512AY

WRITE MODE

The M48Z512A/512AY is in the Write Mode when-

ever W and E are active. The start of a write is ref-

erenced from the latter occurring falling edge of W

or E. A write is terminated by the earlier rising edge

of W or E.

The addresses must be held valid throughout the

Table 10. Write Mode AC Characteristics

2. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.

Symbol

Parameter

M48Z512A/M48Z512AY

Unit

-70

-85

Min

Max

Min

Max

Write Cycle Time

70

85

ns

Address Valid to Write Enable Low

0

0

ns

Address Valid to Chip Enable Low

0

0

ns

Write Enable Pulse Width

55

65

ns

Chip Enable Low to Chip Enable High

55

75

ns

Write Enable High to Address Transition

5

5

ns

Chip Enable High to Address Transition

15

15

ns

Input Valid to Write Enable High

30

35

ns

Input Valid to Chip Enable High

30

35

ns

Write Enable High to Input Transition

0

0

ns

Chip Enable High to Input Transition

10

10

ns

(1, 2)

Write Enable Low to Output Hi-Z

25

30

ns

Address Valid to Write Enable High

65

75

ns

Address Valid to Chip Enable High

65

75

ns

(1, 2)

Write Enable High to Output Transition

5

5

ns

of another read or write cycle. Data-in must be val-

be kept high during write cycles to avoid bus con-

tention; although, if the output bus has been acti-

vated by a low on E and G, a low on W will disable