STM32F103X8 datasheet(81/84 Pages) STMICROELECTRONICS

81 / 84 page

STM32F103xx

Revision history

81/84

18-Oct-2007

STM32F103CBT6, STM32F103T6 and STM32F103T8 root part

numbers added (see Table 2: Device features and peripheral counts

(STM32F103xx performance line))

VFQFPN36 package added (see Section 6: Package characteristics).

All packages are ECOPACK® compliant. Package mechanical data

inch values are calculated from mm and rounded to 4 decimal digits

(see Section 6: Package characteristics).

Table 3: Pin definitions updated and clarified.

Table 25: Low-power mode wakeup timings updated.

TA min corrected in Table 10: Embedded internal reference voltage.

Note 4 added below Table 21: HSE 4-16 MHz oscillator characteristics.

VESD(CDM) value added to Table 31: ESD absolute maximum ratings.

Note 3 added and VOH parameter description modified in Table 34:

Output voltage characteristics.

Note 1 modified under Table 35: I/O AC characteristics.

Equation 1 and Table 45: RAIN max for fADC = 14 MHz added to

Section 5.3.17: 12-bit ADC characteristics.

VAIN, tS max, tCONV, VREF+ min and tlat max modified, notes modified

and tlatr added in Table 44: ADC characteristics.

Figure 29: ADC accuracy characteristics updated. Note 1 modified

below Figure 30: Typical connection diagram using the ADC.

Electrostatic discharge (ESD) on page 52 modified.

Number of TIM4 channels modified in Figure 1: STM32F103xx

performance line block diagram.

Maximum current consumption Table 11, Table 12 and Table 13

updated. Vhysmodified in Table 33: I/O static characteristics.

Table 47: ADC accuracy updated. tVDD modified in Table 8: Operating

conditions at power-up / power-down. VFESD value added in Table 29:

EMS characteristics.

Values corrected, note 2 modified and note 3 removed in Table 25:

Low-power mode wakeup timings.

Table 14: Typical and maximum current consumptions in Stop and

Standby modes: Typical values added for VDD/VBAT = 2.4 V, Note 5

modified, Note 3 added.

Table 17: Typical current consumption in Standby mode added. On-chip

peripheral current consumption on page 41 added.

ACCHSI values updated in Table 23: HSI oscillator characteristics.

Vprog added to Table 27: Flash memory characteristics.

Upper option byte address modified in Figure 8: Memory map.

Typical fLSI value added in Table 24: LSI oscillator characteristics and

internal RC value corrected from 32 to 40 kHz in entire document.

TS_temp added to Table 48: TS characteristics. NEND modified in

Table 28: Flash memory endurance and data retention.

TS_vrefint added to Table 10: Embedded internal reference voltage.

Handling of unused pins specified in General input/output

characteristics on page 53. All I/Os are CMOS and TTL compliant.

Figure 31: Power supply and reference decoupling (VREF+ not

connected to VDDA) modified.

tJITTER and fVCO removed from Table 26: PLL characteristics.

Appendix A: Important notes on page 81 added.

Added Figure 13, Figure 14, Figure 15 and Figure 17.

Table 56.

Document revision history (continued)

Date

Revision

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