UPC177GR-9LG, UPC339GR-9LG

R03DS0140EJ0200 Rev.2.00

Page 3 of 7

Feb.14.25

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

MIN.

TYP.

MAX.

Unit

Power Supply Voltage (Dual Supply)

V ±

±1

±16

V

Power Supply Voltage (V - = GND)

V +

+2

+32

V

ELECTRICAL CHARACTERISTICS

UPC177GR-9LG, UPC339GR-9LG (TA = 25 °C, V + = +5 V, V - = GND)

Parameter

Symbol

MIN.

TYP.

MAX.

Unit

Test Condition

Input Offset Voltage

VIO

±1

±5

mV

VO = 1.4 V, VREF = 1.4 V, RS = 0 Ω

Input Offset Current

IIO

±5

±50

nA

VO = 1.4 V

Input Bias Current Note 6

IB

20

250

nA

VO = 1.4 V

Large Signal Voltage Gain

AV

200000

RL = 15 kΩ

Circuit Current Note 7

ICC

1.1

2

mA

RL = ∞, IO = 0 A

Common Mode Input

Voltage Range

VICM

0

V + -1.5

V

Output Saturation Voltage

VOL

0.2

0.4

V

VIN(-) = 1 V, VIN(+) = 0 V, IO SINK = 4 mA

Output Sink Current

IO SINK

6

16

mA

VIN(-) = 1 V, VIN(+) = 0 V, VO ≤ 1.5V

Output Leakage Current

IO LEAK

0.1

nA

VIN(+) = 1 V, VIN(-) = 0 V, VO = 5 V

Pulse Response Time Note 8

1.6

μs

RL = 5.1 kΩ, VRL = 5 V

【

Note】 6. Input bias currents flow out from IC. Because each currents are base current of PNP-transistor on input stage.

7. This current flows irrespective of the existence of use.

8. Response time can be decreased if the overdrive voltage rebel is up.

TYPICAL APPLICATION CIRCUIT EXAMPLE

Comparator with Hysteresis

OUTPUT

1, 2, 13, 14

3

12

RL

V +

VIN

VREF

4, 6, 8, 10

5, 7, 9, 11

+

-

VREF : V - ~ V + -1.5 [V]

OUTPUT

RL

V +

INPUT

VRL

VREF

+

-

R2

R1

• スレッシュホールド電圧

VTH (High) ≒ VREF +

R1

RL + R2 + R1 (VRL - VREF)

VTH (Low) ≒ VREF - R1

R1 + R2 (VREF - VOL)

(VRL > VREF > VOL)

Threshold Voltage