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CD54HC4015 Datasheet(PDF) 5 Page - Texas Instruments |
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CD54HC4015 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 11 page  5 Test Circuit and Waveform FIGURE 1. HC SETUP TIMES, HOLD TIMES, REMOVAL TIME, AND PROPAGATION DELAY TIMES FOR EDGE TRIGGERED SEQUENTIAL LOGIC CIRCUITS trCL tfCL GND VCC GND VCC 50% 90% 10% GND CLOCK INPUT DATA INPUT OUTPUT SET, RESET OR PRESET VCC 50% 50% 90% 10% 50% 90% tREM tPLH tSU(H) tTLH tTHL tH(L) tPHL IC CL 50pF tSU(L) tH(H) CD54HC4015, CD74HC4015 |
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