RA2E2 datasheet(39/101 Pages) RENESAS

39 / 101 page

Table 2.31

SCI timing (2) (2 of 2)

Conditions: VCC = AVCC0 = 1.6 to 5.5 V

Parameter

Symbol

Min

Max

Unit*1

Test

conditions

Simple

SPI

Slave access time

2.4 V ≤ VCC ≤ 5.5 V

tSA

—

tPcyc

Figure 2.26

1.8 V ≤ VCC < 2.4 V

24 MHz ≤ PCLKB ≤

32 MHz

—

PCLKB < 24 MHz

—

1.6 V ≤ VCC < 1.8 V

—

Slave output release time 2.4 V ≤ VCC ≤ 5.5 V

tREL

—

tPcyc

1.8 V ≤ VCC < 2.4 V

24 MHz ≤ PCLKB ≤

32 MHz

—

PCLKB < 24 MHz

—

1.6 V ≤ VCC < 1.8 V

—

Note 1. tPcyc: PCLKB cycle.

tSPCKWH

VOH

VOL

VOH

tSPCKWL

tSPCKr

tSPCKf

VOL

tSPcyc

tSPCKWH

VIH

VIL

VIH

tSPCKWL

tSPCKr

tSPCKf

VIL

tSPcyc

VOH = 0.7 × VCC, VOL = 0.3 × VCC, VIH = 0.7 × VCC, VIL = 0.3 × VCC

SCKn

master select

output

SCKn

slave select input

Note:

n = 9

Figure 2.22

SCI simple SPI mode clock timing

RA2E2 Datasheet

2. Electrical Characteristics

R01DS0387EJ0150 Rev.1.50

Nov 8, 2025

Page 39 of 101

RA2E2 Datasheet(PDF) 39 Page - Renesas Technology Corp

RA2E2 Datasheet(HTML) 39 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL