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AS7343

Datasheet

• PUBLIC

DS001046

• v6-00 • 2023-Jun-07

│ 42

10.2.8

Miscellaneous Configuration

CFG0 Register (Address 0xBF)

Figure 53:

CFG0 Register

Addr: 0xBF

CFG0

Bit

Bit Name

Default

Access

Bit Description

7:6

Reserved

LOW_POWER

Low Power Idle.

When asserted, the device will automatically run in a

low power mode whenever all functions are in wait

states or disabled.

REG_BANK

0: Register access to register 0x80 and above

1: Register access to register 0x20 to 0x7F

Note: Bit needs to be set to access registers 0x20 to

0x7F. If registers 0x80 and above needs to be

accessed,

bit needs to be set to “0”.

Reserved

WLONG

Trigger Long.

Increases the WTIME setting by a factor of 16.

1:0

Reserved

CFG3 Register (Address 0xC7)

Figure 54:

CFG3 Register

Addr: 0xC7

CFG3

Bit

Bit Name

Default

Access

Bit Description

7:5

Reserved

SAI

Sleep After Interrupt.

If set, the oscillator is turned off whenever an

interrupt is active. SAI_ACTIVE is set in this event.

To activate the oscillator again, clear all interrupts

and clear the SAI_ACTIVE bit.

3:0

Reserved

0xC

Reserved

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