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db09284e_V3.01_preliminary_2017-07-06

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AS89020

V3.01

3 BLOCK DIAGRAM

The main components of the AS89020 are shown in Figure 2. The input currents are amplified by

independently programmable transimpedance amplifiers. All channels are simultaneously sampled and

sequentially converted to digital data by a 12 bit successive approximation analog-to-digital converter

(SAR). The integrated SPI interface is used to program the trans-impedance amplifiers and control the

analog-to-digital converter. The results of the analog-to-digital conversion are also available via SPI

interface. Reference currents (pin REXT) and reference voltages (VBH, VRH, VRL, VRT) for the ADC and

the transimpedance amplifiers are all implemented internally. It is recommended to use the voltage VRT

as a reference voltage for the external photodiodes. External capacitances are required on four reference

voltage pins to achieve an optimal noise suppression for the analog-to-digital conversion.

The input CONVN can be used for externally triggered sampling of the input signal currents. The AS89020

can be switched into the Power Down mode via the pin PDN.

Figure 2: Block Diagram