8.4.3 100% Duty-Cycle Operation

The device offers a low input-to-output voltage differential by entering 100% duty cycle mode. When the

minimum off-time of typically 30ns is reached, the TPSM8281x skips switching cycles while approaching 100%

mode. In 100% mode, the high-side MOSFET switch is constantly turned on. This is particularly useful in

battery-powered applications to achieve longest operation time by taking full advantage of the whole battery

voltage range. The minimum input voltage to maintain a minimum output voltage is given by:

VIN (min) = VOUT (min) + IOUT × RDP

(2)

where

• RDP is the resistance from VIN to VOUT, which includes the high-side MOSFET on-resistance and DC

resistance of the inductor

• VOUT (min) is the minimum output voltage the load can accept

8.4.4 Current Limit and Short Circuit Protection

The TPSM8281x is protected against overload and short circuit events. If the inductor current exceeds the

current limit ILIMH, the high-side MOSFET is turned off and the low-side MOSFET is turned on to ramp down

the inductor current. The high-side MOSFET turns on again only if the current in the low-side MOSFET has

decreased below the low-side current limit. Due to internal propagation delays, the actual current can exceed the

static current limit. The dynamic current limit is given as:

(

)

L

peak typ

LIMH

PD

V

I

I

t

L

=

+

×

(3)

where

• ILIMH is the static current limit, as specified in the electrical characteristics

• L is the effective inductance (typically 470nH)

• VL is the voltage across the inductor (VIN - VOUT)

• tPD is the internal propagation delay of typically 50ns

The dynamic peak current is calculated as follows:

(

)

50

IN

OUT

peak typ

LIMH

V

V

I

I

ns

L

-

=

+

×

(4)

The low-side MOSFET also contains a negative current limit to prevent excessive current from flowing back

through the inductor to the input. If the low-side sinking current limit is exceeded, the low-side MOSFET is turned

off. In this scenario, both MOSFETs are off until the start of the next cycle. The negative current limit is only

active in Forced PWM mode.

8.4.5 Soft Start / Tracking (SS/TR)

The internal soft-start circuitry controls the output voltage slope during start-up. This control avoids excessive

inrush current and makes sure of a controlled output voltage rise time. This control also prevents unwanted

voltage drops from high impedance power sources or batteries. When EN is set high, the device starts switching

after a delay of about 200μs. Then VOUT rises with a slope controlled by an external capacitor connected to the

SS/TR pin.

A capacitor connected from SS/TR to GND is charged with 2.5µA by an internal current source during soft start

until the capacitor reaches the reference voltage of 0.6V. After reaching 0.6V, the SS/TR pin voltage is clamped

internally while the SS/TR pin voltage keeps rising to a maximum of about 3.3V. The capacitance required to set

a certain ramp-time (tramp) is:

TPSM82810, TPSM82813

SLUSDN6D – SEPTEMBER 2019 – REVISED JUNE 2026

www.ti.com

14

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