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ISO6042LDFPR Datasheet(PDF) 8 Page - Texas Instruments

Part # ISO6042LDFPR
Description  ISO604x Low Power with High Bandwidth, Reinforced, Quad-Channel Digital Isolators
PDF  52 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ISO6042LDFPR Datasheet(HTML) 8 Page - Texas Instruments

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6.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
PACKAGE
UNIT
16-DW
IEC 60664-1
CLR
External clearance(1)
Side 1 to side 2 distance through air
>8.15
mm
CPG
External creepage(1)
Side 1 to side 2 distance across package surface
>8.15
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance)
>17
µm
CTI
Comparative tracking index
IEC 60112
> 600
V
Material Group
According to IEC 60664-1
I
Overvoltage category
Rated mains voltage ≤ 150VRMS
I-IV
Rated mains voltage ≤ 300VRMS
I-IV
Rated mains voltage ≤ 600VRMS
I-IV
Rated mains voltage ≤ 1000VRMS
I-III
DIN EN IEC 60747-17 (VDE 0884-17)
Suitability
DIN EN IEC 60747-17 (VDE 0884-17) suitability(2)
VIORM
Maximum repetitive peak isolation
voltage
AC voltage (bipolar)
1500
VPK
VIOWM
Maximum isolation working voltage
AC voltage (sine wave); time-dependent dielectric
breakdown (TDDB) test.
1061
VRMS
DC voltage
1500
VDC
VIOTM
Maximum transient isolation voltage
VTEST = VIOTM, t = 60s (qualification);
VTEST = 1.2 × VIOTM, t= 1s (100% production)
7071
VPK
VIMP
Maximum impulse voltage(3)
Tested in air, 1.2/50µs waveform per IEC 62368-1
8000
VPK
VIOSM
Maximum surge isolation voltage(4)
VIOSM ≥ 1.3 × VIMP; Tested in oil (qualification test),
1.2/50μs waveform per IEC 62368-1
10400
VPK
qpd
Apparent charge(5)
Method a, After Input-output safety test subgroup
2/3, Vini = VIOTM, tini = 60s; Vpd(m) = 1.2 × VIORM, tm
= 10s
≤5
pC
Method a, After environmental tests subgroup 1, Vini =
VIOTM, tini = 60s; Vpd(m) = 1.6 × VIORM, tm = 10s
≤5
Method b: At routine test (100% production); Vini = 1.2
× VIOTM, tini = 1s; Vpd(m) = 1.875 × VIORM, tm = 1s
(method b1) or Vpd(m) = Vini, tm = tini (method b2)
≤5
CIO
Barrier capacitance, input to output(6)
VIO = 0.4 × sin (2 πft), f = 1MHz
≅1.7
pF
RIO
Insulation resistance, input to output(6)
VIO = 500V, TA = 25°C
>1012
Ω
VIO = 500V, 100°C ≤ TA ≤ 125°C
>1011
VIO = 500V at TS = 150°C
>109
Pollution degree
2
Climatic category
40/125/21
UL 1577
VISO
Withstand isolation voltage
VTEST = VISO , t = 60s (qualification); VTEST = 1.2 ×
VISO , t = 1s (100% production)
5000
VRMS
(1)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.
Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the
isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal
in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these
specifications.
(2)
This device is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured
by means of suitable protective circuits.
(3)
Testing is carried out in air to determine the surge immunity of the package.
(4)
Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier.
(5)
Apparent charge is electrical discharge caused by a partial discharge (pd).
ISO6041
SLLSFV3A – DECEMBER 2025 – REVISED MARCH 2026
www.ti.com
8
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Product Folder Links: ISO6041



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