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AOZ1019AI Datasheet(PDF) 2 Page - Alpha & Omega Semiconductors |
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AOZ1019AI Datasheet(HTML) 2 Page - Alpha & Omega Semiconductors |
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2 / 14 page ![]() AOZ1019 Rev. 1.0 September 2007 www.aosmd.com Page 2 of 14 Ordering Information Pin Configuration Pin Description Block Diagram Part Number Ambient Temperature Range Package Environmental AOZ1019AI -40°C to +85°C SO-8 RoHS PGND LX EN COMP 1 2 3 4 NC VIN AGND FB SO-8 (Top View) 8 7 6 5 Pin Number Pin Name Pin Function 1NC Not connected. 2VIN Supply voltage input. When VIN rises above the UVLO threshold the device starts up. 3AGND Reference connection for controller section. Also used as thermal connection for controller section. Electrically needs to be connected to PGND. 4FB The FB pin is used to determine the output voltage via a resistor divider between the output and GND. 5 COMP External loop compensation pin. 6EN The enable pin is active high. Connect EN pin to VIN if not used. Do not leave the EN pin floating. 7LX PWM output connection to inductor. Thermal connection for output stage. 8 PGND Power ground. Electrically needs to be connected to AGND. 500kHz/ 63kHz Oscillator AGND PGND VIN EN FB COMP LX OTP Internal +5V ILimit PWM Control Logic 5V LDO Regulator UVLO & POR Softstart Reference & Bias 0.8V Q1 PWM Comp Level Shifter + FET Driver ISen EAmp 0.2V + – + – + – + – + 0.96V Frequency Foldback Comparator Over Voltage Protection Comparator + – |
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