General description

ST19NP18-TPM

2/5

Rev 1

1

General description

The ST19NP18-TPM is a cost-effective Trusted Platform Module (TPM) solution. The

ST19NP18-TPM is designed to provide PC platforms with enhanced security and integrity

mechanisms as defined by Trusted Computing Group standards. The product provides full

support of TCG v1.2 specifications.

ST19NP18-TPM is based on the ST19NP18 silicon product.

The ST19NP18 is driven from the Smartcard IC ST19N platform. It is manufactured using

the advanced highly reliable STMicroelectronics CMOS EEPROM technology.

The ST19NP18 has an 8-bit CPU architecture and includes the following on-chip memories:

User ROM, User RAM and EEPROM with state of the art security features. ROM, RAM and

EEPROM memories can be configured into partitions with customized access rules.

The ST19NP18 also includes a Modular Arithmetic Processor (MAP). The 1088-bit

architecture of this cryptographic engine allows processing of modular multiplication,

squaring and additional calculations up to 2176 bit operands.

The Modular Arithmetic Processor (MAP) is designed to speed up cryptographic

calculations using Public Key Algorithms.

The Secure Hash Accelerator allows fast SHA-1 computation especially well suited for BIOS

hash operations during early boot stages.

The ST19NP18 is specially designed in line with TCG PC Client Specific TPM

Implementation Specification (TIS) referring to Intel’s LPC Specification revision 1.1.

Figure 1.

ST19NP18 Block Diagram

INTERNAL BUS

MEMORY ACCESS FIREWALL

Gnd

8-bit

CPU

3 x

8 bit

Timers

CRC

module

LCLK

Clock

Generator

module

ST ROM, MAP and EDES FIREWALL

RAM

User ROM

ST ROM and

Crypto

Libraries

EDES

Accelerator

MAP

1088 bits

537

Vps

TRNG A

&

TRNG B

Security

Admin.

LRESET

EEPROM

SHA

Module

5 x

GPIO

Interface

Gpi02

RAM 2K

LPC

Interface

LFrame

LPCPD

Lad3

Lad2

Lad1

Lad0

PP

SERIRQ

Gpi03

Gpi04

Gpi05

Gpi01