AT45DB081E datasheet(21/82 Pages) RENESAS

21 / 82 page

DS-AT45DB081E-028 Rev. N

Page 21

3/17/26

AT45DB081E Datasheet

7.3

Buffer to Main Memory Page Program without Built-In Erase

The Buffer to Main Memory Page Program without Built-In Erase command allows data that is stored in one of the

SRAM buffers to be written into a pre-erased page in the main memory array. It is necessary that the page in main

memory to be written be previously erased in order to avoid programming errors.

To perform a Buffer to Main Memory Page Program without Built-In Erase using the standard DataFlash page size

(264 bytes), an opcode of 88h for Buffer 1 or 89h for Buffer 2 must be clocked into the device followed by three

address bytes comprised of three dummy bits, 12 page address bits (PA11 - PA0) that specify the page in the main

memory to be written, and nine dummy bits.

To perform a Buffer to Main Memory Page Program using the binary page size (256 bytes), an opcode of 88h for

Buffer 1 or 89h for Buffer 2 must be clocked into the device followed by three address bytes comprised of 4

dummy bits, 12 page address bits (A19 - A8) that specify the page in the main memory to be written, and eight

dummy bits.

When a low-to-high transition occurs on the CS pin, the device programs the data stored in the appropriate buffer

into the specified page in the main memory. The page in main memory that is being programmed must have been

previously erased using one of the erase commands (Page Erase, Block Erase, Sector Erase, or Chip Erase).

The programming of the page is internally self-timed and takes place in a maximum time of tP. During this time, the

RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to

program properly. If a programming error arises, it is indicated by the EPE bit in the Status Register.

7.4

Main Memory Page Program through Buffer with Built-In Erase

The Main Memory Page Program through Buffer with Built-In Erase command combines the Buffer Write and

Buffer to Main Memory Page Program with Built-In Erase operations into a single operation to help simplify

application firmware development. With the Main Memory Page Program through Buffer with Built-In Erase

command, data is first clocked into either Buffer 1 or Buffer 2, the addressed page in memory is then automatically

erased, and then the contents of the appropriate buffer are programmed into the just-erased main memory page.

To perform a Main Memory Page Program through Buffer using the standard DataFlash page size (264 bytes), an

opcode of 82h for Buffer 1 or 85h for Buffer 2 must first be clocked into the device followed by three address bytes

comprised of three dummy bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory to be

written, and nine buffer address bits (BFA8 - BFA0) that select the first byte in the buffer to be written.

To perform a Main Memory Page Program through Buffer using the binary page size (256 bytes), an opcode of

82h for Buffer 1 or 85h for Buffer 2 must first be clocked into the device followed by three address bytes comprised

of 4 dummy bits, 12 page address bits (A19 - A8) that specify the page in the main memory to be written, and eight

buffer address bits (BFA7 - BFA0) that select the first byte in the buffer to be written.

After all address bytes have been clocked in, the device takes data from the input pin (SI) and stores this data in

the specified data buffer. If the end of the buffer is reached, the device wraps around back to the beginning of the

buffer. When there is a low-to-high transition on the CS pin, the device first erases the selected page in main

memory (the erased state is a Logic 1) and then programs the data stored in the buffer into that main memory

page. Both the erasing and the programming of the page are internally self-timed and take place in a maximum

time of tEP. During this time, the RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent erase and programming algorithm that can detect when a byte location

fails to erase or program properly. If an erase or program error arises, it is indicated by the EPE bit in the Status

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