ICS557-01 datasheet(1/11 Pages) RENESAS

Part #	ICS557-01

Description	PCI-EXPRESS GEN1 CLOCK SOURCE

PDF	11 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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DATASHEET

PCI-EXPRESS GEN1 CLOCK SOURCE

ICS557-01

IDT® PCI-EXPRESS GEN1 CLOCK SOURCE

1

ICS557-01

REV P 072512

Description

The ICS557-01 is a clock chip designed for use in

PCI-Express Cards as a clock source. It provides a pair of

differential outputs at 100 MHz in a small 8-pin SOIC

package.

Using IDT’s patented Phase-Locked Loop (PLL)

techniques, the device takes a 25 MHz crystal input and

produces HCSL (Host Clock Signal Level) differential

outputs at 100 MHz clock frequency. LVDS signal levels can

also be supported via an alternative termination scheme.

Features

• Supports PCI-ExpressTM HCSL Outputs

0.7 V current mode differential pair

• Supports LVDS Output Levels

• Packaged in 8-pin SOIC

• RoHS 5 (green) or RoHS 6 (green and lead free)

compliant packaging

• Operating voltage of 3.3 V

• Low power consumption

• Input frequency of 25 MHz

• Short term jitter 100 ps (peak-to-peak)

• Output Enable via pin selection

• Industrial temperature range available

• For PCIe Gen2 applications, see the 5V41064

• For PCIe Gen3 applications, see the 5V41234

Block Diagram

Phase Lock

Loop

Clock

Buffer/

Crystal

Oscillator

VDD

GND

X2

25 MHz

crystal /clock

CLK

OE

CLK

R

R(IREF)

X1

Crystal Tuning Capacitors

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