MSP430F435IPZ datasheet(48/73 Pages) TI

48 / 73 page

MSP430x43x1, MSP430x43x, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344F − JANUARY 2002 − REVISED MAY 2007

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature (unless otherwise

noted) (continued)

12-bit ADC, built-in reference

PARAMETER

TEST CONDITIONS

VCC

MIN

NOM

MAX

UNIT

Positive built-in reference

REF2_5V = 1 for 2.5 V

IVREF+ ≤ IVREF+max

3 V

2.4

2.5

2.6

VREF+

Positive built in reference

voltage output

REF2_5V = 0 for 1.5 V

IVREF+ ≤ IVREF+max

2.2 V/3 V

1.44

1.5

1.56

AVCC minimum voltage,

REF2_5V = 0, IVREF+ ≤ 1mA

2.2

AVCC(min)

AVCC minimum voltage,

Positive built-in reference

REF2_5V = 1, IVREF+ ≤ 0.5mA

VREF+ + 0.15

AVCC(min)

Positive built in reference

active

REF2_5V = 1, IVREF+ ≤ 1mA

VREF+ + 0.15

Load current out of VREF+

2.2 V

0.01

−0.5

IVREF+

Load current out of VREF+

terminal

3 V

−1

IVREF+ = 500 μA +/− 100 μA

Analog input voltage 0 75 V;

2.2 V

±2

LSB

Load-current regulation

Analog input voltage ~0.75 V;

REF2_5V = 0

3 V

±2

LSB

IL(VREF)+

Load current regulation

VREF+ terminal

IVREF+ = 500 μA ± 100 μA

Analog input voltage ~1.25 V;

REF2_5V = 1

3 V

±2

LSB

Load current regulation

IVREF+ =100 μA → 900 μA,

μF Ax 05xV

IDL(VREF) +

Load current regulation

VREF+ terminal

CVREF+=5 μF, Ax ~0.5 x VREF+

Error of conversion result

≤ 1 LSB

3 V

CVREF+

Capacitance at pin VREF+

(see Note 1)

REFON =1,

0 mA

≤ IVREF+ ≤ IVREF+max

2.2 V/3 V

μF

TREF+

Temperature coefficient of

built-in reference

IVREF+ is a constant in the range of

0 mA

≤ IVREF+ ≤ 1 mA

2.2 V/3 V

±100 ppm/°C

tREFON

Settle time of internal

reference voltage (see

Figure 18 and Note 2)

IVREF+ = 0.5 mA, CVREF+ = 10μF,

VREF+ = 1.5 V

2.2 V

NOTES:

1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses

two capacitors between pins VREF+ and AVSS and VREF−/VeREF− and AVSS: 10 μF tantalum and 100 nF ceramic.

2. The condition is that the error in a conversion started after tREFON is less than ±0.5 LSB. The settling time depends on the external

capacitive load.

CVREF+

μF

1 ms

10 ms

100 ms

tREFON

tREFON ≈ .66 x CVREF+ [ms] with CVREF+ in μF

100

μF

Figure 18. Typical Settling Time of Internal Reference tREFON vs External Capacitor on VREF+

MSP430F435IPZ Datasheet(PDF) 48 Page - Texas Instruments

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