ADSP-CM409F datasheet(79/124 Pages) AD

79 / 124 page

Rev. A

Page 79 of 124

November 2015

ADSP-CM402F/CM403F/CM407F/CM408F/CM409F

Asynchronous Flash Read

Table 37 and Figure 27 show asynchronous flash memory read timing, related to the static memory controller (SMC).

Table 37. Asynchronous Flash Read

Parameter

Min

Max

Unit

Switching Characteristics

tAMSADV

SMC0_Ax (Address)/SMC0_AMSx Assertion Before SMC0_AOE Low1

1 PREST value set using the SMC_BxETIM.PREST bits.

PREST × tSCLK – 2

tWADV

SMC0_AOE Active Low Width2

2 RST value set using the SMC_BxTIM.RST bits.

RST × tSCLK – 3

tDADVARE

SMC0_ARE Low Delay From SMC0_AOE High3

3 PREAT value set using the SMC_BxETIM.PREAT bits.

PREAT × tSCLK – 3

tHARE

Output

4 Hold After SMC0_ARE High5

4 Output signals are SMC0_Ax, SMC0_AMS.

5 RHT value set using the SMC_BxTIM.RHT bits.

RHT × tSCLK – 2

tWARE

6 SMC0_BxCTL.ARDYEN bit = 0.

SMC0_ARE Active Low Width

7 RAT value set using the SMC_BxTIM.RAT bits.

RAT × tSCLK – 2

Figure 27. Asynchronous Flash Read

SMC0_Ax

(ADDRESS)

tAMSADV

tDADVARE

tWADV

tWARE

tHARE

READ LATCHED

DATA

SMC0_AMSx

(NOR_CE)

SMC0_AOE

(NOR_ADV)

SMC0_ARE

(NOR_OE)

SMC0_Dx

(DATA)

ADSP-CM409F Datasheet(PDF) 79 Page - Analog Devices

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