ST10F167 datasheet(33/69 Pages) STMICROELECTRONICS

33 / 69 page

33/69

ST10F167

BOOTSTRAP LOADER

To activate the Boot-strap loader, a hardware re-

set with RSTIN pin low and an external pull-up re-

sistor connected to the ALE pin, is applied. This

forces the chip into a special test mode. The pro-

gram execution starts from 1K bytes ROM,

mapped from 0 to 3FF hex which is not accessible

in normal execution mode.

This test ROM contains a one-time programmable

flash EPROM, loaded with a self-test program plus

the Boot-strap loader program. When the Boot-

strap loader mode is activated, an instruction fetch

is performed from the test ROM regardless of the

configuration selected with the EBC0, EBC1 and

BUSACT pins. The reset vector in the test ROM

branches to the self-test program, while the Non-

Maskable Interrupt vector (NMI) branches to the

Boot-strap loader routine.

The self-test routine execution time is approxi-

mately 10ms. It terminates with a software reset

instruction (SRST), where the chip is restarted ac-

JBC

Jump relative and clear bit if direct bit is set

JNBS

Jump relative and set bit if direct bit is not set

CALLA, CALLI, CALLR

Call absolute/indirect/relative subroutine if condition is met

CALLS

Call absolute subroutine in any code segment

PCALL

Push direct word register onto system stack and call

absolute subroutine

TRAP

Call interrupt service routine via immediate trap number

PUSH, POP

Push/pop direct word register onto/from system stack

SCXT

Push direct word register onto system stack and update

RET

Return from intra-segment subroutine

RETS

Return from inter-segment subroutine

RETP

Return from intra-segment subroutine and pop direct

word register from system stack

RETI

Return from interrupt service subroutine

SRST

Software Reset

IDLE

Enter Idle Mode

PWRDN

Enter Power Down Mode (assumes NMI-pin low)

SRVWDT

Service Watchdog Timer

DISWDT

Disable Watchdog Timer

EINIT

Signify End-of-Initialization on RSTOUT-pin

ATOMIC

Begin ATOMIC sequence

EXTR

Begin EXTended Register sequence

EXTP(R)

Begin EXTended Page (and Register) sequence

2 / 4

EXTS(R)

Begin EXTended Segment (and Register) sequence

2 / 4

NOP

Null operation

Table 17.1

Instruction Set (cont’d)

Mnemonic

Description

Bytes

ST10F167 Datasheet(PDF) 33 Page - STMicroelectronics

ST10F167 Datasheet(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

Datasheet Download

Link URL