ST10R172L-B0 Errata Sheet

2/3

2.2 CORE.4: INCORRECT INSTRUCTION FETCH ON JUMP TO ITSELF

The bug happens In the following program sequence:

...

...

Label_A: JMPR cc_XX, Label_A

Word Intruction 1;

Word Intruction 2

Word Intruction 3

...

...

...

In the following conditions:

- code is fetched from External Memory,

- the loop JMPR cc_XX, Label_A is being executed,

- a PEC transfer with PSW as destination triggers a change of the condition cc_XX and so, the loop

is finished,

the Word Intruction1 is

Workaround: If JMPA is used instead of JMPR, the bug does not occur.

2.3 EBC.3: VISIBLE MODE

When visible mode is enabled (syscon.1 = 1), data of a read access to an XBUS peripheral

is not driven to the external bus (Port 0). Instead, Port 0 is tri-stated during these read

accesses.

If all external devices are configured in 8-bit demultiplexed mode, an XBUS-peripheral write can cause

a conflict on P0H (Port 0 [8:15])

.

2.4 EBC.4: XPERS ACCESS IN XPERSHARE/EMULATION MODE

In emulation mode and if the Startup Configuration 8-bit multiplexed mode is selected, P0H

(Port 0 [8:15]) is always an output and write accesses to XPERs cannot be done as these

would cause a conflict.

Workaround: Use a Startup Configuration other than 8-bit multiplexed mode.

If HOLD mode is entered (P6.5 = 0) following an 8-bit multiplexed mode access and if

Xpershare is enabled, Xper accesses will cause a conflict on the internal XBUS xb_data

[15:7] bus.

Workaround: None.