ST10R272L-B0 Errata Sheet

2/4

2.2 ST_MAC.9: COCMP INSTRUCTION INVERTED OPERANDS

According to the ST10 Family Programming Manual, the CoCmp instruction substracts a

40-bit signed operand from the 40-bit accumulator content (acc - op2\op1), and updates the

N, Z and C flags in the MSW register, leaving the accumulator unchanged.

In error, the reverse operation (op2\op1 - acc) has been implemented in the MacUnit. There-

fore, the N and C flags are set according to the reverse operation (Z flag is not affected).

Workaround: Change interpretation of the N and C flags in the MSW register.

2.3 ST_MAC.10: E-FLAG EVALUATION FOR COSHR AND COASHR INSTRUCTIONS

WHEN SATURATION MODE IS ENABLED

The Logical and the Arithmetic Right Shift instructions (CoShr/CoAshr) are specified not to be affected

by the saturation mode (MS bit of the MCW reg.). The result loaded in the accumulator is never saturat-

ed but the evaluation of E flag in the MSW register is erroneous when saturation mode is enabled

and the E flag would be set

.

In this example, the E flag is kept clear however MAE is used.

Workaround: Disable saturation mode before using Logical and Arithmetic Right Shift in-

structions and re-enable it just after.

MS bit is set: saturation

mode is enabled

Accumulator

SL

E

SV

C

Z

N

Example:

Mov

R5,

#5555h

--

----

----h

-

-

-

-

-

-

CoLoad

R5, R5

00

5555

5555h

0

0

0

0

0

0

Nop

00

5555

5555h

0

0

0

0

0

0

Mov

MSW,

#007Fh

7F

5555

5555h

0

0

0

0

0

0

Nop

7F

5555

5555h

0

0

0

0

0

0

CoShr

#1

3F

AAAA

AAAAh

0

0

0

0

0

0

error