AD2S1210CSTZ datasheet(16/36 Pages) AD

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AD2S1210

Rev. 0 | Page 16 of 36

THEORY OF OPERATION

RESOLVER TO DIGITAL CONVERSION

The AD2S1210 operates on a Type II tracking closed-loop

principle. The output continually tracks the position of the

resolver without the need for external conversion and wait

states. As the resolver moves through a position equivalent

to the least significant bit weighting, the output is updated by

one LSB.

The converter tracks the shaft angle θ by producing an output

angle ϕ that is fed back and compared to the input angle θ, and

the resulting error between the two is driven towards 0 when

the converter is correctly tracking the input angle. To measure

the error, S3 − S1 is multiplied by cosϕ and S2 − S4 is multiplied by

sinϕ to give

cos

sin

(for S3 − S1)

sin

cos

sin

(for S2 − S4)

The difference is taken, giving

)

sin

cos

(sin

sin

−

(2)

This signal is demodulated using the internally generated

synthetic reference, yielding

)

sin

cos

(sin

−

(3)

Equation 3 is equivalent to E0sin(θ − ϕ), which is approximately

equal to E0(θ − ϕ) for small values of θ − ϕ, where θ − ϕ =

angular error.

The value E0 (θ − ϕ) is the difference between the angular error

of the rotor and the digital angle output of the converter.

A phase-sensitive demodulator, some integrators, and a compensa-

tion filter form a closed-loop system that seeks to null the error

signal. When this is accomplished, ϕ equals the Resolver Angle θ

within the rated accuracy of the converter. A Type II tracking

loop is used so that constant velocity inputs can be tracked

without inherent error.

FAULT DETECTION CIRCUIT

The AD2S1210 fault detection circuit can sense loss of resolver

signals, out-of-range input signals, input signal mismatch, or

loss of position tracking; however, in the event of a fault, the

position indicated by the AD2S1210 may differ significantly

from the actual shaft position of the resolver.

Monitor Signal

The AD2S1210 generates a monitor signal by comparing the

angle in the position register to the incoming sine and cosine

signals from the resolver. The monitor signal is created in a

similar fashion to the error signal described in the Resolver to

Digital Conversion section. The incoming signals, sinθ and

cosθ, are multiplied by the sin and cos of the output angle,

respectively, and then added together.

cos

sin

Monitor

(4)

where:

A1 is the amplitude of the incoming sine signal (A1 × sinθ).

A2 is the amplitude of the incoming cosine signal (A2 × cosθ).

θ is the resolver angle.

ϕ is the angle stored in the position register.

Note that Equation 4 is shown after demodulation, with the

Carrier Signal sinωt removed. Also, note that for matched input

signal (that is, a no fault condition), A1 = A2.

When A1 = A2 and the converter is tracking (θ = ϕ), the

monitor signal output has a constant magnitude of A1 (Monitor

= A1 × (sin2 θ + cos2 θ) = A1), which is independent of shaft

angle. When A1 ≠ A2, the monitor signal magnitude varies

between A1 and A2 at twice the rate of shaft rotation. The

monitor signal is used as described in the following sections to

detect degradation or loss of input signals.

Loss of Signal Detection

The AD2S1210 indicates that a loss of signal (LOS) has

occurred for four separate conditions.

•

When either resolver input (sine or cosine) falls below the

specified LOS sine/cosine threshold. This threshold is

defined by the user and is set by writing to the internal

•

When any of the resolver input pins (SIN, SINLO, COS, or

COSLO) are disconnected from the sensor.

•

When any of the resolver input pins (SIN, SINLO, COS, or

COSLO) are clipping the power rail or ground rail of the

AD2S1210. Refer to the Sine/Cosine Input Clipping section.

•

When a configuration parity error has occurred. Refer to

the Configuration Parity Error section.

A loss of signal is caused if either of the stator windings of the

resolver (sine or cosine) are open circuit or have a number of

shorted turns. LOS is indicated by both the DOS and LOT pins

latching as logic low outputs. The DOS and LOT pins are reset

to a no fault state when the user enters configuration mode and

reads the fault register. The LOS condition has priority over

both the DOS and LOT conditions, as shown in Table 6. To

determine the cause of the LOS fault detection, the user must

read the fault register, Address 0xFF (see the Register Map

section).

When a loss of signal is detected due to the resolver inputs (sine

or cosine) falling below the specified LOS sine/cosine threshold,

the electrical angle through which the resolver may rotate before

the LOS can be detected by the AD2S1210 is referred to as the

LOS angular latency. This is defined by the specified LOS sine/

cosine threshold set by the user and the maximum amplitude of

the input signals being applied to the AD2S1210. The worst-case

angular latency can be calculated as follows:

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