Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

ADE5166 Datasheet(PDF) 115 Page - Analog Devices

Part # ADE5166
Description  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  148 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADE5166 Datasheet(HTML) 115 Page - Analog Devices

Back Button ADE5166 Datasheet HTML 111Page - Analog Devices ADE5166 Datasheet HTML 112Page - Analog Devices ADE5166 Datasheet HTML 113Page - Analog Devices ADE5166 Datasheet HTML 114Page - Analog Devices ADE5166 Datasheet HTML 115Page - Analog Devices ADE5166 Datasheet HTML 116Page - Analog Devices ADE5166 Datasheet HTML 117Page - Analog Devices ADE5166 Datasheet HTML 118Page - Analog Devices ADE5166 Datasheet HTML 119Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 115 / 148 page
background image
Preliminary Technical Data
ADE5166/ADE5169/ADE5566/ADE5569
Rev. PrB | Page 115 of 148
Table 121. RTC Pointer Address SFR (RTCPTR, 0xA3)
Bit
Mnemonic
Default
Description
7
RTCW_RB
0
Read/write selection.
RTCW_RB
Results
0
The RTC register at the address is read into the RTCDAT SFR.
1
The data in the RTCDAT SFR is written in the RTC register at the address. This
operation is completed only if the KEYREG SFR is set to 0xEA, the instruction
before writing to the RTCDAT SFR.
6 to 5
Reserved
N/A
Reserved.
4 to 0
RTC_ADDRESS
0
Target address for read/write operation.
Table 122. RTC Pointer Data SFR (RTCDAT, 0xA4)
Bit
Mnemonic
Default
Description
7 to 0
RTC_DATA
0
Location of data for read/write RTC operation.
Table 123. RTC Nominal Compensation SFR (RTCCOMP, 0xF6)
Bit
Mnemonic
Default
Description
7 to 0
RTCCOMP
0
The RTCCOMP SFR holds the nominal RTC compensation value at 25°C. Note that this register
is reset after a watchdog reset, an external reset or a power on reset (POR).
Table 124. RTC Temperature Compensation SFR (TEMPCAL, 0xF7)
Bit
Mnemonic
Default
Description
7 to 0
TEMPCAL
0
The TEMPCAL SFR is adjusted based on the temperature read in the TEMPADC to calibrate the
RTC over temperature. This allows the external crystal shift to be compensated over
temperature. Note that this register is reset after a watchdog reset, an external reset or a
power-on reset (POR).
Table 125. Key SFR (KYREG, 0xC1)
Bit
Mnemonic
Default
Description
7 to 0
KYREG
0
To unlock the POWCON SFR and enable a write operation, 0xA7 should be written to KYREG.
To unlock the HTHSEC, SEC, MIN or HOUR timekeeping registers or the RTCCAL, XTALOS,
XTALG1 or XTALG2 registers and enable a write operation, 0xEA should be written to KYREG.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com