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STD60NF3LL Datasheet(PDF) 1 Page - STMicroelectronics |
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STD60NF3LL Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 9 page  1/9 April 2002 STD60NF3LL N-CHANNEL 30V - 0.0075 Ω - 60A DPAK STripFET™ II POWER MOSFET (1) Starting Tj=25°C, ID=30A, VDD=27.5V s TYPICAL RDS(on) = 0.0075Ω s OPTIMAL RDS(ON) x Qg TRADE-OFF @ 4.5V s CONDUCTION LOSSES REDUCED s SWITCHING LOSSES REDUCED s ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL DESCRIPTION This application specific Power Mosfet is the third genaration of STMicroelectronics unique “Single Feature Size ™” strip-based process. The result- ing transistor shows the best trade-off between on- resistance ang gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high effi- ciency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC/DC CONVERTERS ABSOLUTE MAXIMUM RATINGS (q) Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STD60NF3LL 30V <0.0095 Ω 60A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 30 V VGS Gate- source Voltage ± 16 V ID Drain Current (continuos) at TC = 25°C 60 A ID Drain Current (continuos) at TC = 100°C 43 A IDM (l) Drain Current (pulsed) 240 A PTOT Total Dissipation at TC = 25°C 100 W Derating Factor 0.67 W/°C EAS (1) Single Pulse Avalanche Energy 700 mJ Tstg Storage Temperature – 55 to 175 °C Tj Operating Junction Temperature DPAK 1 3 TO-252 INTERNAL SCHEMATIC DIAGRAM |
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