7
3.0 RADIATION HARDNESS
The UT69RH051 incorporates special design and layout features
which allow operation in high-level radiation environments.
UTMC has developed special low-temperature processing
techniques designed to enhance the total-dose radiation hardness
of both the gate oxide and the field oxide while maintaining the
circuit density and reliability. For transient radiation hardness
and latchup immunity, UTMC builds all radiation-hardened
products on epitaxial wafers using an advanced twin-tub CMOS
process. In addition, UTMC pays special attention to power and
ground distribution during the design phase, minimizing dose-
rate upset caused by rail collapse.
RADIATION HARDNESS DESIGN SPECIFICATIONS
1
Note:
1. Worst case temperature TA = +125°C.
2. Adams 90% worst case environment (geosynchronous).
4.0 ABSOLUTE MAXIMUM RATINGS
1
(Referenced to VSS)
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2. Test per MIL-STD-883, Method 1012.
Total Dose
1.0E6
rad(Si)
LET Threshold
14
MeV-cm2/mg
Neutron Fluence
1.0E14
n/cm2
Saturated Cross-Section (1Kx8)
1E-4
cm2/device
Single Event Upset
1.3E-7
errors/device-day2
Single Event Latchup1
LET>128
MeV-cm2/mg
SYMBOL
PARAMETER
LIMITS
UNITS
VDD
DC Supply Voltage
-0.5 to 7.0
V
VI/O
Voltage on Any Pin
-0.5 to VDD+0.3V
V
TSTG
Storage Temperature
-65 to +150
°C
PD
Maximum Power Dissipation
750
mW
TJ
Maximum Junction Temperature
175
°C
Θ
JC
Thermal Resistance, Junction-to-Case
2
10
°C/W
II
DC Input Current
±10
mA
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