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STL28NF3LL Datasheet(PDF) 1 Page - STMicroelectronics |
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STL28NF3LL Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 6 page ![]() 1/6 PRELIMINARY DATA November 2002 STL28NF3LL N-CHANNEL 30V - 0.0055 Ω -28A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET (1) Starting Tj = 25°C, ID = 14A, VDD =18V s TYPICAL RDS(on) = 0.0055Ω s IMPROVED DIE-TO-FOOTPRINT RATIO s VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique “STripFET™” technolo- gy. The resulting transistor shows extremely low on- resistance and minimal gate charge. The new Pow- erFLAT™ package allows a significant reduction in board space without compromising performance. APPLICATIONS s DC-DC CONVERTERS ABSOLUTE MAXIMUM RATINGS (q) Pulse width limited by safe operating area (#) Limited by Wire Bonding TYPE VDSS RDS(on) ID STL28NF3LL 30 V < 0.0065 Ω 28 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0) 30 V VDGR Drain-gate Voltage (RGS =20kΩ) 30 V VGS Gate- source Voltage ± 16 V ID(#) Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C 28 17.5 A A IDM ( ) Drain Current (pulsed) 112 A PTOT Total Dissipation at TC = 25°C 80 W Derating Factor 0.64 W/°C EAS (1) Single Pulse Avalanche Energy 2 J Tstg Storage Temperature –55 to 150 °C Tj Max. Operating Junction Temperature PowerFLAT™(5x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM |
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