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STL35NF3LL Datasheet(PDF) 1 Page - STMicroelectronics

Part # STL35NF3LL
Description  N-CHANNEL 30V - 0.0055ohm - 35A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET
PDF  6 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STL35NF3LL Datasheet(HTML) 1 Page - STMicroelectronics

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TARGET DATA
October 2001
STL35NF3LL
N-CHANNEL 30V - 0.0055
Ω - 35A PowerFLAT™
LOW GATE CHARGE STripFET™ MOSFET
(1)ISD<35A, di/dt<300A/µs, VDD<V(BR)DSS, TJ<TJMAX
(2) Starting Tj = 25°C, ID = 30A, VDD = 27.5V
s
TYPICAL RDS(on) = 0.0055Ω
s
IMPROVED DIE-TO-FOOTPRINT RATIO
s
VERY LOW PROFILE PACKAGE
DESCRIPTION
This Power MOSFET is the second generation of
STMicroelectronics unique “STripFET™” technolo-
gy. The resulting transistor shows extremely low on-
resistance and minimal gate charge. The new Pow-
erFLAT™ package allows a significant reduction in
board space without compromising performance.
APPLICATIONS
s
DC-DC CONVERTERS
s
BATTERY MANAGEMENT IN NOMADIC
EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
(q) Pulse width limited by safe operating area
(#) Limited by Wire Bonding
TYPE
VDSS
RDS(on)
ID
STL35NF3LL
30 V
< 0.007
Ω
35 A
Symbol
Parameter
Value
Unit
VDS
Drain-source Voltage (VGS = 0)
30
V
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
30
V
VGS
Gate- source Voltage
± 15
V
ID(#)
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
35
22
A
A
IDM (q)
Drain Current (pulsed)
140
A
PTOT
Total Dissipation at TC = 25°C
80
W
Derating Factor
0.64
W/°C
dv/dt(1)
Peak Diode Recovery voltage slope
TBD
V/ns
EAS (2)
Single Pulse Avalanche Energy
TBD
J
Tstg
Storage Temperature
–55 to 150
°C
Tj
Max. Operating Junction Temperature
PowerFLAT™(6x5)
(Chip Scale Package)
INTERNAL SCHEMATIC DIAGRAM


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