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JS28F640P30T85 Datasheet(PDF) 31 Page - Numonyx B.V

Part # JS28F640P30T85
Description  Numonyx StrataFlash Embedded Memory
PDF  99 Pages
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

JS28F640P30T85 Datasheet(HTML) 31 Page - Numonyx B.V

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November 2007
Datasheet
Order Number: 306666-11
31
P30
R3
tELQV
CE# low to output valid
VCC = 1.8 V – 2.0
V
-85
ns
VCC = 1.7 V – 2.0
V
-88
256/512-Mb TSOP
packages
-95
R4
tGLQV
OE# low to output valid
-
25
ns
1,2
R5
tPHQV
RST# high to output valid
-
150
ns
1
R6
tELQX
CE# low to output in low-Z
0
-
ns
1,3
R7
tGLQX
OE# low to output in low-Z
0
-
ns
1,2,3
R8
tEHQZ
CE# high to output in high-Z
-
24
ns
1,3
R9
tGHQZ
OE# high to output in high-Z
-
24
ns
R10
tOH
Output hold from first occurring address, CE#, or OE#
change
0-
ns
R11
tEHEL
CE# pulse width high
20
-
ns
1
R12
tELTV
CE# low to WAIT valid
-
17
ns
R13
tEHTZ
CE# high to WAIT high-Z
-
20
ns
1,3
R15
tGLTV
OE# low to WAIT valid
-
17
ns
1
R16
tGLTX
OE# low to WAIT in low-Z
0
-
ns
1,3
R17
tGHTZ
OE# high to WAIT in high-Z
-
20
ns
Latching Specifications
R101
tAVVH
Address setup to ADV# high
10
-
ns
1
R102
tELVH
CE# low to ADV# high
10
-
ns
R103
tVLQV
ADV# low to output valid
VCC = 1.8 V – 2.0
V
-85
ns
VCC = 1.7 V – 2.0
V
-88
256/512-Mb TSOP
packages
-95
R104
tVLVH
ADV# pulse width low
10
-
ns
R105
tVHVL
ADV# pulse width high
10
-
ns
R106
tVHAX
Address hold from ADV# high
9
-
ns
1,4
R108
tAPA
Page address access
-
25
ns
1
R111
tphvh
RST# high to ADV# high
30
-
ns
Clock Specifications
R200
fCLK
CLK frequency
-
52
MHz
1,3,5,6
TSOP Package
-
40
MHz
R201
tCLK
CLK period
19.2
-
ns
TSOP Package
25
-
ns
R202
tCH/CL
CLK high/low time
5
-
ns
R203
tFCLK/RCLK
CLK fall/rise time
-
3
ns
Synchronous Specifications(5,6)
Table 17: AC Read Specifications for 256/512-Mbit Densities (Sheet 2 of 3)
Num
Symbol
Parameter
Speed
Min
Max
Unit
Notes



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