PC48F4400P0VB0 datasheet(37/102 Pages) NUMONYX

37 / 102 page

November 2007

Datasheet

Order Number: 290701-18

Numonyx™ Wireless Flash Memory (W18)

W13

tBHWH (tBHEH)

WP# Setup to WE# (CE#) High

200

W14

tWHGL (tEHGL)

Write Recovery before Read

W16

tWHQV

WE# High to Valid Data

AVQV +20

3,6,10

W18

tWHAV

WE# High to Address Valid

3,9,10

W19

tWHCV

WE# High to CLK Valid

3,10

W20

tWHVH

WE# High to ADV# High

3,10

W21

tVHWL

ADV# High to WE# Low

<21

W22

tCHWL

CLK to WE# Low

<21

W27

tWHEL

WE# High to CE# Low

W28

tWHVL

WE# High to ADV# Low

Notes:

Write timing characteristics during erase suspend are the same as during write-only operations.

A write operation can be terminated with either CE# or WE#.

Sampled, not 100% tested.

Write pulse width low (tWLWH or tELEH) is defined from CE# or WE# low (whichever occurs last) to CE# or WE# high

(whichever occurs first). Hence, tWLWH = tELEH = tWLEH = tELWH.

Write pulse width high (tWHWL or tEHEL) is defined from CE# or WE# high (whichever is first) to CE# or WE# low

(whichever is last). Hence, tWLWH = tEHEL = tWHEL = tEHWL.

System designers should take this into account and may insert a software No-Op instruction to delay the first read after

issuing a command.

For commands other than resume commands.

VPP should be held at VPP1 or VPP2 until block erase or program success is determined.

Applicable during asynchronous reads following a write.

10.

tWHCH/L OR tWHVH must be met when transitioning from a write cycle to a synchronous burst read. tWHCH/L and tWHVH both

refer to the address latching event (either the rising/falling clock edge or the rising ADV# edge, whichever occurs first).

11.

The specifications tVHWL and tCHWL can be ignored if there is no clock toggling during the write bus cycle.

Table 15: AC Write Characteristics — 90 nm (Sheet 2 of 2)

Sym

Parameter (1,2)

VCCQ =

1.7 V – 1.95 V

Unit

Notes

Min

Max

Table 16: AC Write Characteristics — 130 nm (Sheet 1 of 2)

Sym

Parameter (1,2)

VCCQ =

1.7 V – 2.24 V

Unit

Notes

-60

Min

Max

tPHWL (tPHEL)

RST# High Recovery to WE# (CE#) Low

150

tELWL (tWLEL)

CE# (WE#) Setup to WE# (CE#) Low

tWLWH (tELEH)

WE# (CE#) Write Pulse Width Low

tDVWH (tDVEH)

Data Setup to WE# (CE#) High

tAVWH (tAVEH)

Address Setup to WE# (CE#) High

tWHEH (tEHWH)

CE# (WE#) Hold from WE# (CE#) High

tWHDX (tEHDX)

Data Hold from WE# (CE#) High

tWHAX (tEHAX)

Address Hold from WE# (CE#) High

tWHWL (tEHEL)

WE# (CE#) Pulse Width High

5,6,7

W10

tVPWH (tVPEH)

VPP Setup to WE# (CE#) High

200

W11

tQVVL

VPP Hold from Valid SRD

3,8

W12

tQVBL

WP# Hold from Valid SRD

3,8

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