L6728

Application details

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10

Application details

10.1

Compensation network

The control loop showed in Figure 5 is a voltage mode control loop. The output voltage is

regulated to the internal reference (when present, offset resistor between FB node and GND

can be neglected in control loop calculation).

Error Amplifier output is compared to oscillator saw-tooth waveform to provide PWM signal

amplitude. This waveform is filtered by the output filter.

The converter transfer function is the small signal transfer function between the output of the

∆V

Figure 5.

PWM control loop

function ideally equal to -Z

Compensation goal is to close the control loop assuring high DC regulation accuracy, good

dynamic performances and stability. To achieve this, the overall loop needs high DC gain,

high bandwidth and good phase margin.

High DC gain is achieved giving an integrator shape to compensation network transfer

has to cross 0 dB axis with -20 dB/decade slope.

As an example, Figure 6 shows an asymptotic bode plot of a type III compensation.

L

R

C

OUT

ESR

R

F

C

F

C

P

R

FB

C

S

OSC

V

IN

∆V

OSC

+

+

_

_

V

OUT

V

REF

Z

FB

PWM

COMPARATOR

ERROR

AMPLIFIER

R

S