BUF16821 datasheet(14/29 Pages) EPCOS

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Write: Nonvolatile Memory for the DAC Register

Read: Nonvolatile Memory for the DAC Register

BUF16821

SBOS428 – JULY 2008 ...................................................................................................................................................................................................... www.ti.com

Communication may be terminated by sending a

To write to a single nonvolatile register:

premature STOP or START condition on the bus, or

1. Send a START condition on the bus.

by not acknowledging.

2. Send the device address and read/write bit =

To read multiple registers:

LOW. The BUF16821 acknowledges this byte.

Although the BUF16821 acknowledges 000000

1. Send a START condition on the bus.

through 010111, it stores and returns data only

2. Send the device address and read/write bit =

from these addresses:

LOW. The BUF16821 acknowledges this byte.

–

000000 through 001111

3. Send either the OUT1 pointer address byte to

–

010010 and 010011

start at the first DAC, or send the pointer address

It returns 0000 for reads from 010000 through

byte for whichever register is the first in the

010001,

and

010100

through

010111.

See

sequence of DACs/VCOMs to be read. The

Table 4 for DAC/VCOM addresses.

BUF16821 begins with this DAC/VCOM and steps

3. Send a DAC/VCOM pointer address byte. Set bit

through subsequent DACs/VCOMs in sequential

D7 = 0 and D6 = 0. Bits D5–D0 are the

order.

DAC/VCOM address.

4. Send a START or STOP/START condition on the

4. Send two bytes of data for the nonvolatile register

bus.

of the specified DAC/VCOM. Begin by sending the

5. Send the correct device address and read/write

most significant byte first (bits D15–D8, of which

bit = HIGH. The BUF16821 acknowledges this

only bits D9 and D8 are data bits, and bits

byte.

D15–D14 must be 01), followed by the least

6. Receive two bytes of data. They are for the

significant byte (bits D7–D0). The register is

specified DAC/VCOM. The first received byte is the

updated after receiving the second byte.

most significant byte (bits D15–D8; only bits D9

5. Send a STOP condition on the bus.

and

have

meaning),

the

least

significant byte (bits D7–D0).

The BUF16821 acknowledges each data byte. If the

master terminates communication early by sending a

7. Acknowledge after receiving each byte of data.

STOP or START condition on the bus, the specified

8. When all desired DACs have been read, send a

nonvolatile

not

updated.

Writing

STOP or START condition on the bus.

nonvolatile register also updates the DAC/VCOM

Communication may be terminated by sending a

premature STOP or START condition on the bus, or

The DAC/VCOM register and DAC/VCOM output voltage

by not sending the acknowledge bit. The reading of

are updated immediately, while the programming of

registers

DieID,

DieRev,

and

MaxBank

not

the nonvolatile memory takes up to 250

µs. Once a

supported in this mode of operation (these values

nonvolatile register write command has been issued,

must be read using the single register read method).

no communication with the BUF16821 should take

place for at least 250

µs. Writing or reading over the

serial interface while the nonvolatile memory is being

The BUF16821 is able to write to the nonvolatile

written jeopardizes the integrity of the data being

memory

single

DAC/VCOM

single

stored.

communication

transaction.

contrast

the

BUF20820, writing to multiple nonvolatile memory

words in a single transaction is not supported. Valid

To read the data present in nonvolatile register for a

DAC/VCOM pointer addresses begin with 000000

particular DAC/VCOM channel, the master must first

(which corresponds to OUT1) through 001111 (which

issue a general acquire command, or a single acquire

corresponds to OUT16). Addresses 010010 and

command with the appropriate DAC/VCOM channel

010011 are VCOM1 and VCOM2, respectively.

chosen. This action updates both the DAC/VCOM

When programming the nonvolatile memory, the

analog supply voltage must be between 9V and 20V.

master

may

then

read

from

the

appropriate

Write commands are performed by setting the

DAC/VCOM register as described earlier.

read/write bit LOW.

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