Circuit description

STV7710

10/21

4

Circuit description

4.1

Pin description

4.2

Data bus configuration

This table describes the position of the first data sampled by the first rising edge of the CLK

signal.

Table 5.

STV7710 pin description

Symbol

Function

Description

OUT(01-96)

Output

Power output

VSSP

Ground

Ground of power outputs

VPP

Supply

High voltage supply of power outputs

BLK

Input

Blanking input

POC

Input

Power output control input

F/R

Input

Selection of shift direction

VCC

Supply

5V logic supply

VSSLOG

Ground

Logic ground

VSSSUB

Ground

Substrate ground

CLK

Input

Clock of data shift register

STB

Input

Latch of data to outputs

DATA_A

Input/output

Shift register input

DATA_B

Input/output

Shift register output

TEST

Input

Test input pin

Table 6.

STV7710 data bus configuration

F/R

Input

Data shift

Output

CLK

01

02

03

04

05

06

...

91

92

93

94

95

96

H

DATA_A Output 01

02

030405

06

9192

93

94

9596DATA_B

Forward

shift

L

DATA_B Output 96

95

949392

91

0605

04

03

0201DATA_A

Reverse

shift