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STP60NS04ZB Datasheet(PDF) 1 Page - STMicroelectronics |
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STP60NS04ZB Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 8 page ![]() 1/8 November 2002 STP60NS04ZB N-CHANNEL CLAMPED 10m Ω -60A TO-220 FULLY PROTECTED MESH OVERLAY™ MOSFET TO-220 1 2 3 INTERNAL SCHEMATIC DIAGRAM s TYPICAL RDS(on) = 0.010 Ω s 100% AVALANCHE TESTED s LOW CAPACITANCE AND GATE CHARGE s 175°C MAXIMUM JUNCTION TEMPERATURE DESCRIPTION This fully clamped MOSFET is produced by using the latest advanced Company’s Mesh Overlay pro- cess which is based on a novel strip layout. The in- herent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation con- ditions such as those encountered in the automotive environment .Any other application requiring extra ruggedness is also recommended. APPLICATIONS s ABS,SOLENOID DRIVERS s MOTOR CONTROL s DC-DC CONVERTERS ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STP60NS04ZB CLAMPED < 0.015 Ω 60 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0) CLAMPED V VDG Drain-gate Voltage CLAMPED V VGS Gate- source Voltage CLAMPED V ID Drain Current (continuous) at TC = 25°C 60 A ID Drain Current (continuous) at TC = 100°C 42 A IDG Drain Gate Current (continuous) ± 50 mA IGS Gate Source Current (continuous) ± 50 mA IDM ( ) Drain Current (pulsed) 240 A PTOT Total Dissipation at TC = 25°C 150 W Derating Factor 1 W/°C VESD(G-S) Gate-Source ESD(HBM-C=100 pF, R=1.5 K Ω) 6kV VESD(G-D) Gate-Drain ESD(HBM-C=100 pF, R=1.5 K Ω) 4kV VESD(D-S) Drain-Source ESD(HBM-C=100 pF, R=1.5 K Ω) 4kV Tstg Storage Temperature –65to175 °C Tj Max. Operating Junction Temperature |
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