17531A datasheet(6/20 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

17531A

STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics

Characteristics noted under conditions TA = 25°C, VDD = 3.0 V, VM = 5.0 V, GND = 0 V unless otherwise noted. Typical values

noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

POWER INPUT

Motor Supply Voltage (Using Internal Charge Pump) (7)

VM-CP

2.0

5.0

8.6

Motor Supply Voltage (VCRES Applied Externally)

(8)

VM-NCP

–

Gate Drive Voltage

- Motor Supply Voltage (VCRES Applied Externally) (9)

VCRES -VM

5.0

6.0

–

Logic Supply Voltage

VDD

2.7

3.0

3.6

Driver Quiescent Supply Current

No Signal Input

Power Save Mode

IQM

IQM-PSAVE

–

100

1.0

µA

Logic Quiescent Supply Current

No Signal Input (10)

Power Save Mode

IQVDD

IQVDD-

PSAVE

–

1.0

Operating Power Supply Current

Logic Supply Current (11)

Charge Pump Circuit Supply Current (12)

IVDD

ICRES

–

3.0

0.7

Low VDD Detection Voltage

(13)

VDDDET

1.0

1.6

2.5

Driver Output ON Resistance (14)

RDS(ON)

–

0.8

1.2

Ohms

GATE DRIVE

Gate Drive Voltage (12)

No Current Load

VCRES

13.5

Gate Drive Ability (Internally Supplied)

RES = -1.0 mA

VCRESload

8.5

9.2

–

Recommended External Capacitance (C1L–C1H, C2L–C2H, CRES–GND)

CCP

0.01

0.1

1.0

µF

Notes

Gate drive voltage VCRES is applied from an external source. 2 x VDD + VM must be <

RES max (13.5 V).

No internal charge pump used. VCRES is applied from an external source.

RDS(ON) is not guaranteed if

RES - VM < 5.0 V. Also, function is not guaranteed if

RES - VM < 3.0 V.

10.

VDD includes the current to pre-driver circuit.

11.

DD includes the current to predriver circuit at fIN = 100 kHz.

12.

At fIN = 20 kHz.

13.

Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold.

RES is

applied from an external source. 2 x VDD + VM must be <

RES max (13.5 V).

14.

IO = 0.7 A source + sink.

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