M62343GP

REJ03F0075-0300 Rev.3.00 Mar 25, 2008

Page 2 of 7

Pin Arrangement

GND

DI

CLK

LD

1

2

3

4

8

7

6

5

M62343GP

(Top view)

Outline: PTSP0008JB-B (TTP-8DV) (recommend)

PTSP0008JA-A (8P2J-A) (discontinued PKG)

Pin Description

Pin No.

Symbol

Function

6

DI

Serial data input pin. Inputs serial data with a 10-bit data length.

7

CLK

Serial clock input pin. Input signal from DI pin is input to 10-bit shift register at rise of

shift clock.

8

LD

Load pin. When “H” level is input to LD pin, value in 10-bit shift register is loaded into

decoder and D/A output register.

1

2

3

8-bit resolution D/A converter output pins

(After power-on, all channels are reset and DAC data 00h is output.)

4

Power supply voltage pin

5

GND

GND pin