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HD6432351 Datasheet(PDF) 397 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 397 Page - Renesas Technology Corp |
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397 / 1025 page ![]() Section 9 I/O Ports Rev. 3.00 Sep 15, 2006 page 363 of 988 REJ09B0330-0300 9.7.2 Register Configuration Table 9.11 shows the port 6 register configuration. Table 9.11 Port 6 Registers Name Abbreviation R/W Initial Value Address* Port 6 data direction register P6DDR W H'00 H'FEB5 Port 6 data register P6DR R/W H'00 H'FF65 Port 6 register PORT6 R Undefined H'FF55 Note: * Lower 16 bits of the address. Port 6 Data Direction Register (P6DDR) 7 P67DDR 0 W 6 P66DDR 0 W 5 P65DDR 0 W 4 P64DDR 0 W 3 P63DDR 0 W 0 P60DDR 0 W 2 P62DDR 0 W 1 P61DDR 0 W Bit Initial value R/W : : : P6DDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port 6. P6DDR cannot be read; if it is, an undefined value will be read. Setting a P6DDR bit to 1 makes the corresponding port 6 pin an output pin, while clearing the bit to 0 makes the pin an input pin. P6DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual reset, and in software standby mode. As the DMAC is initialized by a manual reset, the pin states are determined by the P6DDR and P6DR specifications. |
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