HD6432351 datasheet(50/1025 Pages) RENESAS

50 / 1025 page

Section 1 Overview

Rev. 3.00 Sep 15, 2006 page 16 of 988

REJ09B0330-0300

Pin No.

Type

Symbol

TFP-120 FP-128

I/O

Name and Function

Interrupts

NMI

Input

Nonmaskable interrupt: Requests a

nonmaskable interrupt. When this pin

is not used, it should be fixed high.

IRQ7 to

IRQ0

28 to 25,

29 to 32

32 to 29,

33, 34,

37, 38

Input

Interrupt request 7 to 0: These pins

request a maskable interrupt.

Address bus

A23 to

28 to 25,

23 to 16,

14 to 7,

5 to 2

32 to 29,

27 to 20,

18 to 11,

9 to 6

Output Address bus: These pins output an

address.

Data bus

D15 to

51 to 48,

46 to 39,

37 to 34

57 to 54,

52 to 45,

43 to 40

I/O

Data bus: These pins constitute a

bidirectional data bus.

Bus control

CS7 to

CS0

29, 30,

61, 60,

117 to 120

33, 34,

69, 66,

127, 128,

1, 2

Output Chip select: Signals for selecting

areas 7 to 0.

Output Address strobe: When this pin is low,

it indicates that address output on

the address bus is enabled.

Output Read: When this pin is low, it

indicates that the external address

space can be read.

HWR

Output High write/write enable:

A strobe signal that writes to external

space and indicates that the upper

half (D15 to D8) of the data bus is

enabled.

The 2CAS type DRAM write enable

signal.

LWR

Output Low write:

A strobe signal that writes to external

space and indicates that the lower

half (D7 to D0) of the data bus is

enabled.

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