HD6432351 datasheet(416/1025 Pages) RENESAS

416 / 1025 page

Section 9 I/O Ports

Rev. 3.00 Sep 15, 2006 page 382 of 988

REJ09B0330-0300

9.10.2

Table 9.17 shows the port C register configuration.

Table 9.17 Port C Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port C data direction register

PCDDR

H'00

H'FEBB

Port C data register

PCDR

R/W

H'00

H'FF6B

Port C register

PORTC

Undefined

H'FF5B

Port C MOS pull-up control register

PCPCR

R/W

H'00

H'FF72

Note:

* Lower 16 bits of the address.

Port C Data Direction Register (PCDDR) [H8S/2351 Only]

PC7DDR

PC6DDR

PC5DDR

PC4DDR

PC3DDR

PC0DDR

PC2DDR

PC1DDR

Bit

Initial value

R/W

PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.

PCDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its

prior state after a manual reset, and in software standby mode. The OPE bit in SBYCR is used to

select whether the address output pins retain their output state or become high-impedance when a

transition is made to software standby mode.

• Modes 1, 4, and 5

The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.

• Modes 2 and 6

Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while

clearing the bit to 0 makes the pin an input port.

• Modes 3 and 7

Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing

the bit to 0 makes the pin an input port.

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