HD6432351 datasheet(428/1025 Pages) RENESAS

428 / 1025 page

Section 9 I/O Ports

Rev. 3.00 Sep 15, 2006 page 394 of 988

REJ09B0330-0300

9.12.2

Table 9.21 shows the port E register configuration.

Table 9.21 Port E Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port E data direction register

PEDDR

H'00

H'FEBD

Port E data register

PEDR

R/W

H'00

H'FF6D

Port E register

PORTE

Undefined

H'FF5D

Port E MOS pull-up control register*

PEPCR

R/W

H'00

H'FF74

Notes: 1. Lower 16 bits of the address.

2. Only applies to the H8S/2351.

Port E Data Direction Register (PEDDR)

PE7DDR

PE6DDR

PE5DDR

PE4DDR

PE3DDR

PE0DDR

PE2DDR

PE1DDR

Bit

Initial value

R/W

PEDDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port E. PEDDR cannot be read; if it is, an undefined value will be read.

PEDDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its

prior state after a manual reset, and in software standby mode.

• Modes 1, 4, 5 [H8S/2350]; modes 1, 2, and 4 to 6 [H8S/2351]

When 8-bit bus mode has been selected, port E pins function as I/O ports. Setting a PEDDR bit

to 1 makes the corresponding port E pin an output port, while clearing the bit to 0 makes the

pin an input port.

When 16-bit bus mode has been selected, the input/output direction specification by PEDDR is

ignored, and port E is designated for data I/O.

For details of 8-bit and 16-bit bus modes, see section 6, Bus Controller.

• Modes 3 and 7 [H8S/2351 only]

Setting a PEDDR bit to 1 makes the corresponding port E pin an output port, while clearing the

bit to 0 makes the pin an input port.

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