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HD6432351 Datasheet(PDF) 482 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 482 Page - Renesas Technology Corp |
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482 / 1025 page  Section 10 16-Bit Timer Pulse Unit (TPU) Rev. 3.00 Sep 15, 2006 page 448 of 988 REJ09B0330-0300 10.2.7 Timer General Register (TGR) 15 1 R/W 14 1 R/W 13 1 R/W 12 1 R/W 11 1 R/W 8 1 R/W 10 1 R/W 9 1 R/W Bit Initial value R/W : : : 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 0 1 R/W 2 1 R/W 1 1 R/W The TGR registers are 16-bit registers with a dual function as output compare and input capture registers. The TPU has 16 TGR registers, four each for channels 0 and 3 and two each for channels 1, 2, 4, and 5. TGRC and TGRD for channels 0 and 3 can also be designated for operation as buffer registers*. The TGR registers are initialized to H'FFFF by a reset, and in hardware standby mode. The TGR registers cannot be accessed in 8-bit units; they must always be accessed as a 16-bit unit. Note: * TGR buffer register combinations are TGRA—TGRC and TGRB—TGRD. |
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