HD6432351 datasheet(151/1025 Pages) RENESAS

151 / 1025 page

Section 5 Interrupt Controller

Rev. 3.00 Sep 15, 2006 page 117 of 988

REJ09B0330-0300

5.5.4

Interrupts during Execution of EEPMOV Instruction

Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.

With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer

is not accepted until the move is completed.

With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt

exception handling starts at a break in the transfer cycle. The PC value saved on the stack in this

case is the address of the next instruction.

Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the

following coding should be used.

L1:

EEPMOV.W

MOV.W

R4,R4

BNE

5.6

DTC and DMAC Activation by Interrupt

5.6.1

Overview

The DTC and DMAC can be activated by an interrupt. In this case, the following options are

available:

• Interrupt request to CPU

• Activation request to DTC

• Activation request to DMAC

• Selection of a number of the above

For details of interrupt requests that can be used with to activate the DTC or DMAC, see section 8,

Data Transfer Controller (DTC), and section 7, DMA Controller (DMAC).

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