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H8SX/1650C Datasheet(PDF) 21 Page - Renesas Technology Corp |
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H8SX/1650C Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 692 page ![]() Rev.2.00 Jun. 28, 2007 Page xxi of xxii 15.5 Usage Notes ...................................................................................................................... 550 15.5.1 Module Stop State Setting ................................................................................ 550 15.5.2 D/A Output Hold Function in Software Standby Mode.................................... 550 Section 16 RAM ................................................................................................551 Section 17 Clock Pulse Generator .....................................................................553 17.1 Register Description ......................................................................................................... 554 17.1.1 System Clock Control Register (SCKCR) ........................................................ 554 17.2 Oscillator........................................................................................................................... 557 17.2.1 Connecting Crystal Resonator .......................................................................... 557 17.2.2 External Clock Input ......................................................................................... 558 17.3 PLL Circuit ....................................................................................................................... 558 17.4 Frequency Divider ............................................................................................................ 558 17.5 Usage Notes ...................................................................................................................... 559 17.5.1 Notes on Clock Pulse Generator ....................................................................... 559 17.5.2 Notes on Resonator ........................................................................................... 560 17.5.3 Notes on Board Design ..................................................................................... 560 Section 18 Power-Down States..........................................................................563 18.1 Features............................................................................................................................. 563 18.2 Register Descriptions ........................................................................................................ 565 18.2.1 Standby Control Register (SBYCR) ................................................................. 566 18.2.2 Module Stop Control Registers A and B (MSTPCRA and MSTPCRB) .......... 569 18.2.3 Module Stop Control Register C (MSTPCRC)................................................. 572 18.3 Multi-Clock Function ....................................................................................................... 573 18.4 Module Stop Function ...................................................................................................... 573 18.5 Sleep Mode ....................................................................................................................... 574 18.5.1 Transition to Sleep Mode.................................................................................. 574 18.5.2 Clearing Sleep Mode......................................................................................... 574 18.6 All-Module-Clock-Stop Mode.......................................................................................... 575 18.7 Software Standby Mode.................................................................................................... 575 18.7.1 Transition to Software Standby Mode .............................................................. 575 18.7.2 Clearing Software Standby Mode ..................................................................... 576 18.7.3 Setting Oscillation Settling Time after Clearing Software Standby Mode ....... 576 18.7.4 Software Standby Mode Application Example................................................. 579 18.8 Hardware Standby Mode .................................................................................................. 580 18.8.1 Transition to Hardware Standby Mode ............................................................. 580 18.8.2 Clearing Hardware Standby Mode.................................................................... 580 18.8.3 Hardware Standby Mode Timing...................................................................... 580 |
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