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H8SX1663 Datasheet(PDF) 409 Page - Renesas Technology Corp |
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H8SX1663 Datasheet(HTML) 409 Page - Renesas Technology Corp |
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409 / 1158 page  Section 7 DMA Controller (DMAC) Rev.1.00 Jun. 07, 2006 Page 357 of 1102 REJ09B0294-0100 Figure 7.15 shows an example of the extended repeat area operation. External memory When the area represented by the lower three bits of DSAR (eight bytes) is specified as the extended repeat area (SARA4 to SARA0 = B'00011) Repeat An interrupt request by extended repeat area overflow can be generated. Area specified by DSAR H'23FFFE H'23FFFF H'240000 H'240001 H'240002 H'240003 H'240004 H'240005 H'240006 H'240007 H'240008 H'240009 H'240000 H'240001 H'240002 H'240003 H'240004 H'240005 H'240006 H'240007 Figure 7.15 Example of Extended Repeat Area Operation When an interrupt by an extended repeat area overflow is used in block transfer mode, the following should be taken into consideration. When a transfer is stopped by an interrupt by an extended repeat area overflow, the address register must be set so that the block size is a power of 2 or the block size boundary is aligned with the extended repeat area boundary. When an overflow on the extended repeat area occurs during a transfer of one block, the interrupt by the overflow is suspended and the transfer overruns. |
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