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HD6433636SW Datasheet(PDF) 345 Page - Renesas Technology Corp |
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HD6433636SW Datasheet(HTML) 345 Page - Renesas Technology Corp |
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345 / 418 page  331 Table A.4 Number of Cycles in Each Instruction (cont) Instruction Mnemonic Instruction Fetch I Branch Addr. Read J Stack Operation K Byte Data Access L Word Data Access M Internal Operation N BSET BSET Rn, @aa:8 2 2 BSR BSR d:8 2 1 BST BST #xx:3, Rd 1 BST #xx:3, @Rd 2 2 BST #xx:3, @aa:8 2 2 BTST BTST #xx:3, Rd 1 BTST #xx:3, @Rd 2 1 BTST #xx:3, @aa:8 2 1 BTST Rn, Rd 1 BTST Rn, @Rd 2 1 BTST Rn, @aa:8 2 1 BXOR BXOR #xx:3, Rd 1 BXOR #xx:3, @Rd 2 1 BXOR #xx:3, @aa:8 21 CMP CMP. B #xx:8, Rd 1 CMP. B Rs, Rd 1 CMP.W Rs, Rd 1 DAA DAA.B Rd 1 DAS DAS.B Rd 1 DEC DEC.B Rd 1 DIVXU DIVXU.B Rs, Rd 1 12 EEPMOV EEPMOV 2 2n+2* 1 INC INC.B Rd 1 JMP JMP @Rn 2 JMP @aa:16 2 2 JMP @@aa:8 2 1 2 JSR JSR @Rn 2 1 JSR @aa:16 2 1 2 JSR @@aa:8 2 1 1 LDC LDC #xx:8, CCR 1 LDC Rs, CCR 1 Note: n: Initial value in R4L. The source and destination operands are accessed n + 1 times each. |
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