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HD6433636SW Datasheet(PDF) 352 Page - Renesas Technology Corp |
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HD6433636SW Datasheet(HTML) 352 Page - Renesas Technology Corp |
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352 / 418 page ![]() 338 B.2 I/O Registers (2) MTCR—Multitone control register H'90 Multitone generator Register name Address to which the register is mapped Name of on-chip supporting module Register acronym Bit numbers Initial bit values Names of the bits. Dashes (—) indicate reserved bits. Full name of bit Descriptions of bit settings Read only Write only Read and write R W R/W Possible types of access Bit Initial value Read/Write 7 DA0E 0 R/W 6 MTEN 0 R/W 5 DIR 0 R/W 3 FR1 0 — 0 FT0 0 R/W 2 FR0 0 R/W 1 FT1 0 R/W 4 — 1 — Fine-tuning counter clock source select FT0 0 1 0 1 Clock Division Ratio 1tOSC (counter clock = fOSC) 2tOSC (counter clock = fOSC/2) 4tOSC (counter clock = fOSC/4) 8tOSC (counter clock = fOSC/8) FT1 0 0 1 1 Frame counter clock source select FR0 0 1 0 1 Clock Division Ratio 1tOSC (counter clock = fOSC) 2tOSC (counter clock = fOSC/2) 4tOSC (counter clock = fOSC/4) 8tOSC (counter clock = fOSC/8) FR1 0 0 1 1 |
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