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HD6433636SW Datasheet(PDF) 240 Page - Renesas Technology Corp |
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HD6433636SW Datasheet(HTML) 240 Page - Renesas Technology Corp |
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240 / 418 page ![]() 226 Transmit Data Register (TDR) Bit 76543210 TDR7 TDR6 TDR5 TDR4 TDR3 TDR2 TDR1 TDR0 Initial value 11111111 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W The transmit data register (TDR) is an 8-bit register for holding transmit data. When SCI3 detects that the transmit shift register (TSR) is empty, it shifts transmit data written in TDR to TSR and starts serial data transmission. While TSR is transmitting serial data, the next byte to be transmitted can be written to TDR, realizing continuous transmission. TDR can be read or written by the CPU at all times. TDR is initialized to H'FF upon reset or in standby mode, watch mode, subactive mode, or subsleep mode. Serial Mode Register (SMR) Bit 76543210 COM CHR PE PM STOP MP CKS1 CKS0 Initial value 00000000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W The serial mode register (SMR) is an 8-bit register for setting the serial data communication format and for selecting the clock source of the baud rate generator. SMR can be read and written by the CPU at any time. SMR is initialized to H'00 upon reset or in standby mode, watch mode, subactive mode, or subsleep mode. Bit 7—Communication Mode (COM): Bit 7 selects asynchronous mode or synchronous mode as the serial data communication mode. Bit 7: COM Description 0 Asynchronous mode (initial value) 1 Synchronous mode |
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