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HD6433636SW Datasheet(PDF) 311 Page - Renesas Technology Corp |
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HD6433636SW Datasheet(HTML) 311 Page - Renesas Technology Corp |
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311 / 418 page ![]() 297 Bit 0—Clock Select 0 (PWCR0): Bit 0 selects the clock supplied to the 14-bit PWM. It is a write-only bit, and is always read as 1. Bit 0: PWCR0 Description 0 Input clock ø/2 (tø* = 2/ø) (initial value) PWM waveform generated with conversion cycle of 16,384/ø and minimum transition width of 1/ø 1 Input clock ø/4 (tø* = 4/ø) PWM waveform generated with conversion cycle of 32,768/ø and minimum transition width of 2/ø Note: * tø: PWM input clock cycle 13.2.2 PWM Data Registers U and L (PWDRU, PWDRL) Bit 76543210 PWDRU — — PWDRU5 PWDRU4 PWDRU3 PWDRU2 PWDRU1 PWDRU0 Initial value 11000000 Read/Write — — WWWWWW Bit 76543210 PWDRL PWDRL7 PWDRL6 PWDRL5 PWDRL4 PWDRL3 PWDRL2 PWDRL1 PWDRL0 Initial value 00000000 Read/Write WWWWWWWW PWDRU and PWDRL together comprise a 14-bit write-only register, with PWDRU as the upper 6 bits and PWDRL as the lower 8 bits. The value written to PWDRU and PWDRL corresponds to the total high-level width of one PWM waveform cycle. When 14-bit data is written to PWDRU and PWDRL, the contents of these registers are latched in the PWM waveform generator, and the PWM waveform generation data is updated. The 14-bit data must be set in the following order: 1. Write lower 8-bit data to PWDRL. 2. Write upper 6-bit data to PWDRU. PWDRU and PWDRL are write-only registers, and all bits are always read as 1. Upon reset, PWDRU and PWDRL together are initialized to H'C000. |
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