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STU40N2LH5 Datasheet(PDF) 3 Page - STMicroelectronics

Part # STU40N2LH5
Description  N-channel 25 V, 0.01 Ω, 40 A, DPAK, IPAK STripFET??V Power MOSFET
PDF  12 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STU40N2LH5 Datasheet(HTML) 3 Page - STMicroelectronics

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STD40N2LH5 - STU40N2LH5
Electrical characteristics
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2
Electrical characteristics
(TCASE = 25°C unless otherwise specified)
Table 4.
Static
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V(BR)DSS
Drain-source breakdown
Voltage
ID = 250 µA, VGS= 0
25
V
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = 25 V
VDS = 25 V, TC = 125 °C
1
10
µA
µA
IGSS
Gate body leakage current
(VDS = 0)
VGS = ± 22 V
±
100
nA
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
1V
RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 20 A
SMD version
0.01
0.012
Ω
VGS= 10 V, ID= 20 A
0.0106 0.0126
Ω
VGS= 5 V, ID= 20 A
SMD version
0.0135
0.017
Ω
VGS= 5 V, ID= 20 A
0.0141 0.0176
Ω
Table 5.
Dynamic
Symbol
Parameter
Test conditions
Min
Typ.
Max.
Unit
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25 V, f=1 MHz,
VGS = 0
840
180
29
pF
pF
pF
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD=15 V, ID = 40 A
VGS = 5 V
(Figure 3)
8
TBD
TBD
nC
nC
nC
Qgs1
Qgs2
Pre Vth gate-to-source
charge
Post Vth gate-to-source
charge
VDD=15 V, ID = 40 A
VGS = 5 V
(Figure 8)
TBD
TBD
nC
nC
RG
Gate input resistance
f=1 MHz gate bias
Bias= 0 test signal
level=20 mV
open drain
1.1
Ω



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